The present invention relates to a semiconductor manufacturing method and, more specifically, to a method for manufacturing a silicon semiconductor thin film having crystallinity. Silicon semiconductor thin films fabricated according to the semiconductor manufacturing method of the invention are suitably used as the material of TFTs (Thin Film Transistors) in active-matrix type LCDs (Liquid Crystal Displays) and various kinds of semiconductor devices.
Although amorphous silicon is generally used as the material of TFTs, yet its electrical characteristics are much inferior to lower than those of single-crystalline semiconductors used in so-called silicon LSIs or the like. Therefore, in LCDs, TFTs are used exclusively as switching devices only, and not used for peripheral circuits to which high performance is demanded. Also, studies have been made on using polysilicon in place of amorphous silicon to improve the characteristics of TFTs. However, polysilicon has limitations in electrical characteristics, not meeting the demand.
Recently, there has been proposed a method for obtaining a silicon film, including the steps of introducing a metallic element, such as nickel, as a catalyst for accelerating the crystallization on the surface portion of the amorphous silicon film so as to cause a reaction between the surface portion of the amorphous silicon film and the metallic element, thereafter removing the reactant, and annealing the remaining silicon film to advance the crystallization, thereby obtaining a silicon film superior in crystallinity (which is referred to as CGS or continuous grain silicon film in some cases, but herein referred to as xe2x80x9ccrystalline silicon filmxe2x80x9d) (Japanese Patent Laid-Open Publication HEI 6-244103).
However, it cannot be neglected that the catalytic element remaining in the crystalline silicon film may have adverse effects on the electrical characteristics and reliability of the TFTs such as shifts of their threshold voltage and deterioration in hot carrier resistance.
Therefore, there have been developed a method of removing the catalytic element remaining in the crystalline silicon film (Japanese Patent Laid-Open Publication HEI 10-223533). That is, as shown in FIG. 2, for example, phosphorus (P) is ion-implanted as an element (referred to as xe2x80x9cgetter elementxe2x80x9d) for gettering the catalytic element at a partial region 3 of a crystalline silicon film 2 formed on a substrate 1, and heat treatment of a specified temperature is performed, by which the catalytic element remaining in the crystalline silicon film 2 is absorbed up to the region 3 (gettering). Subsequently, the region (which is referred to as gettering region) 3 is removed by etching or the like so that a crystalline silicon film 2 of low catalytic-element concentration is left on the substrate 1. TFTs using this crystalline silicon film 2 show excellent electrical characteristics in terms of mobility, subthreshold and the like, compared with those using polysilicon.
Whereas silicon LSIs generally have an impurity concentration of the channel region in the transistor at a level of about 1xc3x971012 cmxe2x88x922, it is known that mixing of metal impurities of higher than the level of about 1xc3x971011 cmxe2x88x922 would have adverse effects on the transistor characteristics. On the ground that the substrate surface concentration of the metallic element is set normally to 1xc3x971012xe2x88x921xc3x971013 cmxe2x88x922 for growth of a crystalline silicon film, it can be considered that the concentration needs to be made below about 1xc3x971010 cmxe2x88x922 by lowering the catalytic-element concentration in a gettered region (region other than the gettering region 3 in the crystalline silicon film 2) 4 to {fraction (1/100)}-{fraction (1/1000)} in the gettering process.
The getterability can be considered roughly as dependent on (1) area ratio between gettering region 3 and gettered region 4, (2) getter element concentration in the gettering region 3, and (3) temperature and time of heat treatment in the gettering process. Among these factors, with regard to (1), the larger the area of the gettering region 3 relative to the area of the gettered region 4 becomes, the more the getterability improves while, unfortunately, the region where TFTs can be formed is limited proportionally. With regard to (2), whereas increasing the getter element concentration leads to increase in getterability, it has been empirically verified that the getterability, after reaching above a certain level of concentration (about 8xc3x971015 cmxe2x88x922), would not improve any more. With regard to (3), whereas increasing the heat treatment temperature allows the gettering to be achieved in shorter time, the total amount of getterable catalytic element can be considered unchanged. From these factors, in order to achieve sufficient gettering so that the characteristics and reliable of transistors are not adversely affected, an area ratio SR between gettering region 3 and gettered region 4, i.e.
SR=(area of gettering region 3)/(area of gettered region 4),
needs to be ensured as a certain high level based on the factor (1).
Therefore, the conventional method has a problem that the area of the gettered region 4, i.e. the area of the crystalline silicon film 2 left on the substrate 1, becomes smaller, so that the layout in the arrangement of the TFTs is limited.
Therefore, an object of the present invention is to provide a semiconductor manufacturing method capable of sufficiently reducing the catalytic element in the crystalline silicon film and also increasing the area of the crystalline silicon film to be left on the substrate.
In order to achieve the above object, according to the present invention, there is provided a semiconductor manufacturing method comprising the steps of:
forming an amorphous silicon film on a substrate;
introducing into the amorphous silicon film a catalytic element for accelerating crystallization and performing a first heat treatment to crystallize the amorphous silicon film into a crystalline silicon film;
providing a mask layer having an opening extending therethrough thicknesswise on a surface of the crystalline silicon film;
forming a sacrifice layer which continuously covers the surface of the mask layer and a portion of the crystalline silicon film corresponding to the opening;
introducing to the sacrifice layer and the portion corresponding to the opening out of the crystalline silicon film a getter element for gettering the catalytic element; and
performing a second heat treatment to getter the catalytic element from the crystalline silicon film to the sacrifice layer through the opening of the mask layer.
With the semiconductor manufacturing method of the invention, during the second heat treatment, the catalytic element present in a region (gettered region) other than the portion corresponding to the opening out of the crystalline silicon film (hereinafter, referred to as opening-correspondent portion) is gettered to the opening-correspondent portion of the crystalline silicon film. Further, the catalytic element is gettered from the opening-correspondent portion of the crystalline silicon film to the sacrifice layer through the opening of the mask layer. Thereafter, the sacrifice layer and the opening-correspondent portion of the crystalline silicon film are removed. As a result of this, a crystalline silicon film of low catalytic-element concentration (gettered region) is left on the substrate.
As can be seen, in the present invention, the whole sacrifice film in addition to the opening-correspondent portion of the crystalline silicon film acts as a gettering region that absorbs up the catalytic element. As a result of this, a volume ratio VR between gettering region and gettered region, i.e.
VR=(volume of gettering region)/(volume of gettered region),
can be set to a large one. For example, when the thickness of the sacrifice film is set equal to the thickness of the crystalline silicon film, the volume ratio VR between gettering region and gettered region is necessarily beyond 1. Also, when the thickness of the sacrifice layer is set thicker than the thickness of the crystalline silicon film, the volume ratio VR between gettering region and gettered region can be set to an even larger one. Accordingly, the catalytic element in the gettered region can be reduced sufficiently. As a result of this, TFTs using this crystalline silicon film (gettered region) can be made excellent in electrical characteristics and reliability. Further, the area of the opening-correspondent portion of the crystalline silicon film can be reduced proportionally to the extent to which the getterability has improved over the prior art, so that the area of the crystalline silicon film (gettered region) left on the substrate can be enlarged. Accordingly, TFTs arrangement on the substrate is not limited in their layout.
In one embodiment, the mask layer comprises at least one of silicon oxide film, silicon nitride film and SiON film.
With this semiconductor manufacturing method of one embodiment, since the mask layer comprises at least one of silicon oxide film, silicon nitride film and SiON film, silicon can be used as the material of the sacrifice layer that covers the mask layer. Also, such a mask layer protects the ground crystalline silicon film (gettered region) during the removal of the sacrifice layer after the gettering process. Further, such a mask layer is easy to remove by selective etching with the crystalline silicon film left.
Also, in one embodiment, material of the sacrifice layer is any one of amorphous silicon, polysilicon and single crystal silicon.
With this semiconductor manufacturing method of one embodiment, the material of the sacrifice layer is any one of amorphous silicon, polysilicon and single crystal silicon, the sacrifice layer being formed principally from the silicon element as the crystalline silicon film is. By virtue of this homogeneity of material, the catalytic element can be gettered from the crystalline silicon film to the sacrifice film with high efficiency.
Also, in one embodiment, temperature of the second heat treatment is set to within a range of 500xc2x0 C. to 700xc2x0 C.
With this semiconductor manufacturing method of one embodiment, since the temperature of the second heat treatment is set to within a range of 500xc2x0 C. to 700xc2x0 C., the second heat treatment is performed at a relatively low temperature. Accordingly, deformation of the substrate and the like can be prevented. Further, the getter element is desirably one having a small diffusion coefficient, as compared with the catalytic element, at the temperature of the second heat treatment. This is because such a getter element does not diffuse into the mask layer but remains in the sacrifice layer during the second heat treatment, thus allowing the catalytic element to be gettered with high efficiency. In this semiconductor manufacturing method of one embodiment, since the temperature of the second heat treatment is set to within a range of 500xc2x0 C.-700xc2x0 C., it is easy to select such a getter element.
Also, in one embodiment, one kind of element or a plurality of kinds of elements selected from among Fe, Co, Ni, Cu, Ru, Rh, Pd, Os, Ir, Pt and Au is used as the catalytic element.
With this semiconductor manufacturing method of one embodiment, since one kind of element or a plurality of kinds of elements selected from among Fe, Co, Ni, Cu, Ru, Rh, Pd, Os, Ir, Pt and Au is used as the catalytic element, a high-quality crystalline silicon film can be obtained actually.
Also, in one embodiment, one kind of element or a plurality of kinds of elements selected from among nitrogen, phosphorus, arsenic, antimony and bismuth is used as the getter element.
With this semiconductor manufacturing method of one embodiment, one kind of element or a plurality of kinds of elements selected from among nitrogen, phosphorus, arsenic, antimony and bismuth is used as the getter element. These elements, having a property of bonding with metallic elements, allow the metallic element as a catalyst to be gettered with high efficiency. As a result of this, the catalytic-element concentration in the gettered region can be reduced sufficiently.